Nvidia’s CEO, Jensen Huang, recently made headlines by announcing that the company’s most advanced AI chip, Blackwell, will transition from CoWoS-S to CoWoS-L advanced packaging technology. This shift highlights the evolving nature of TSMC’s chip-on-wafer-on-substrate (CoWoS) technology, advancing to address interconnecting challenges in large, powerful chips designed for AI and high-performance computing (HPC) applications.
While Nvidia’s demand for advanced packaging from TSMC remains robust, Huang revealed during a recent interview that the technology needed is changing. When asked about potential reductions in orders, Huang clarified that the company was not cutting back but rather transitioning its needs to new packaging solutions.
Blackwell, Nvidia’s most cutting-edge AI chip, utilizes multiple chips interconnected via CoWoS, a complex packaging technology from Taiwan Semiconductor Manufacturing Company (TSMC), Nvidia’s primary chip supplier. The CoWoS-S technology relies on a single silicon interposer and through-silicon vias (TSVs) to enable high-speed signal transmission between the chip dies and the substrate. However, using a single silicon interposer can lead to yield challenges.
In contrast, CoWoS-L, TSMC’s latest packaging technology, incorporates a local silicon interconnect (LSI) and an RDL interposer to create a reconstituted interposer (RI), offering more excellent chip design and packaging flexibility. It retains the key benefits of CoWoS-S, such as TSVs, while addressing yield issues associated with large silicon interposers in the previous technology.
According to Reuters, Nvidia has been selling Blackwell chips as fast as TSMC can produce them, but packaging has become a bottleneck due to limited capacity. Surprisingly, as Huang noted, the available advanced packaging capacity at TSMC has increased fourfold in the past two years.
“As we move into Blackwell, we will predominantly use CoWoS-L. Of course, we’re still manufacturing Hopper, which will continue to use CoWoS-S. We’ll also be transitioning CoWoS-S capacity to CoWoS-L,” Huang explained during an event in Taichung, Taiwan, hosted by chip supplier Siliconware Precision Industries. “It’s not about reducing capacity; it’s about expanding capacity into CoWoS-L.”
Hopper refers to Nvidia’s previous GPU architecture platform, which preceded the Blackwell release in March 2024. Nvidia has historically relied on CoWoS-S for its AI chip interconnections.
Analyst Ming-Chi Kuo of TF International Securities recently stated that Nvidia is shifting its focus toward CoWoS-L, which could impact its suppliers. Taiwanese media also reported that Nvidia reduced CoWoS-S orders, potentially affecting TSMC’s revenue.
Despite these shifts, Huang emphasized that Nvidia’s Blackwell chips are in high demand, and packaging constraints remain the primary bottleneck. He also noted that the increase in advanced packaging capacity over the last two years has been substantial.
Huang declined to comment on the impact of new U.S. export restrictions, which limit the export of AI chips to most countries except for a select group of U.S. allies, including Taiwan.
