A new wave of leaks is giving shape to AMD’s next-generation Zen 6 CPU architecture, expected to debut in late 2026. According to documents reportedly shared with top motherboard manufacturers, AMD will rely on both TSMC’s advanced 2nm-class N2P process and refined 3nm N3P node for its upcoming desktop, mobile, and server chips.
Zen 6: More Cores, More Efficiency, and a Flexible Node Strategy
The Zen 6 rollout is shaping up to be AMD’s most ambitious yet, with five distinct silicon families already on the roadmap. On the server front, AMD is preparing the EPYC “Venice” line, split into:
- Venice Classic for general-purpose workloads, and
- Venice Dense is optimized for high-density cloud computing.
Both are reportedly built on TSMC’s N2P process, a performance-tuned variant of 2nm that offers an 8–10% clock speed uplift over the current N3E node. Each Classic die will feature 12 Zen 6 cores, while each Dense die will scale up to 32 Zen 6c cores. In total, a fully loaded EPYC Venice Dense CPU could deliver a staggering 256 cores and 512 threads when eight chiplets are linked via an organic interposer.
Ryzen 10000 and Olympic Ridge: Desktop Goes N2P
On the consumer side, AMD’s next-gen Ryzen 10000 desktop CPUs—codenamed Olympic Ridge—will also benefit from the N2P node. This positions AMD’s desktop chips for a significant leap in performance and efficiency, aligning them closely with their EPYC server cousins.
Gaming Laptops and Thin-and-Lights Get Tailored Chip Designs
High-end gaming laptops won’t be left out either. The “Gator Range” platform targets performance notebooks exceeding 55W and will also utilize N2P-based chiplets.
In the mainstream mobile segment, AMD will pivot to a hybrid strategy:
- The upcoming “Medusa Point” chips will utilize a chiplet design that combines an N2P compute die with an N3P-based I/O die, optimizing for cost, power, and space.
- Lower-end Medusa models will be monolithic N3P designs, offering a more budget-friendly solution without sacrificing efficiency.
Two additional platforms, “Medusa Halo” (high-end) and “Bumblebee” (entry-level), are also reportedly in development, but their exact specifications and node assignments remain unknown.
First Silicon by Christmas, Volume by Fall 2026
According to insiders, the first Zen 6 silicon is expected to return from the fab by the end of 2025, with full production ramping up in time for back-to-school laptops and a server refresh wave in late 2026.
AMD, TSMC, and the Power of Co-Design
What makes this generation unique is AMD’s tight co-optimization with TSMC. The two companies have worked closely on the metal stack and standard cell libraries, meaning the final implementation may deviate significantly from off-the-shelf N2P—something AMD insiders refer to informally as “N2-AMD.”
What About RDNA 5?
While this leak sheds light on Zen 6 CPUs, the next-generation RDNA 5 (or “UDNA”) GPU architecture remains a mystery, especially regarding its manufacturing process. With AMD’s hybrid design approach in CPUs, there’s speculation that GPUs might follow a similar path.
