Most of you are probably aware of the newest ATX spec, v3.0, since it significantly changes all power supplies. Because of the PCIe 5.0 (12+4 pin) introduction, Intel had to change its ATX spec, which is the ultimate design specification for all PSU manufacturers.

For more than ten years, there weren't significant changes in the ATX spec, and suddenly, Intel went crazy, turning things upside-down. I have written a detailed article at Tom's Hardware explaining everything you need to know about ATX v3.0. Still, it is probably too technical for some of you to follow, so in this article, I will stay in the bullet points only, and if you have any questions, feel free to leave a comment.

[su_youtube url="https://youtu.be/XRDdBb6hn2g" height="600" title="Intel ATX v3.0 Spec - The end of all current PSUs?"]

The significant changes that the ATX v3.0 spec brings are the following:

• A new 12VHPWR (aka 12+4 pin)  connector for PCIe cards that can deliver up to 600W.
• The 12VHPWR should have a label informing the maximum power it can deliver.
• All PSUs with more than 450W max power must have 12VHPWR connectors.
• The PSU communicates with the graphics card, through sideband signals, its power capabilities so that the latter can set its power limit accordingly.
• PSUs should be able to turn on/off 175,200 times per year of their life without breaking! (This is insane!!)
• There are some changes in low load efficiency. Above 60% is required for 10W or 2% of max-rated capacity, and above 70% is a recommendation now instead of a requirement.
• Increased tolerance for high power spikes, reaching up to 200% of the PSU's rated power for 100μs with Intel's custom set duty cycle.
• Increased slew rates for transient loads (2.5 - 5x times higher for the +12V rail. They remain the same for the other rails)
• It is the first time the 12V rail can go up to 12.2V to allow for lower voltage drops with transient loads.
• Wider load regulation limits for the +12V rail (+5 to -8% on the PCIe connectors and +5 to -7% for the other connectors).
• There are some changes in the speed of the Power On signal to allow for faster response and the system's wake-up, even when the rails are not at zero levels but somewhere in between.
• Efficiency and design requirements for Alternative Low Power Modes (ALPM), previously called Alternative Sleep Modes. One of them sets some limits to the standby rail's efficiency!
• The labels on the PSUs should include T1 and T3 timings, among others. The role of these timing signals has been upgraded.
• Finally, the most important of all is adding a new certification standard, Cybenetics, besides 80 Plus, which is in the references section.

Of all the above changes, the most important ones are Intel's new transient response tests, which go up to 200% of the PSU's max-rated capacity. That said, this test only lasts for 100us, so that it won't create any problems in most PSUs. On the other hand, the toughest transient tests are the 180% load for 1ms and the 160% load for 10ms. I expect most PSUs to fail in these two, and so far, this is the case. It is crazy to ask the PSU to have appropriately set protection features and at the same time to require such high power levels at periods of 1ms and above.

I had discussed the new transient tests with Intel before the ATX spec went public and told them that instead of pushing the PSU manufacturers for significant changes, it would be better to push the GPU manufacturers to fix the DC-DC circuits on their products and eliminate any nasty power spikes. As it seems Intel couldn't force GPU manufacturers, Nvidia and AMD, to do that, it chose the tough road instead.

We cannot know how nasty the power spikes will be in the upcoming GPU generations, but according to my friend Igor (Igorslab), the 3090Ti, which seems to be the bridge between the 3000 and 4000 series, doesn't have increased power spikes, an indication that Nvidia fixed its power delivery circuits. With Powenetics v2 in hand, finally, I will be able to conduct thorough investigations on this matter once my 3090Ti arrives.